In an information processing apparatus such as a server equipped with many Central Processing Units (CPUs) and memory, processes are executed for setting and tuning of transmission parameters for the memory interface and initializing the memory etc. The processes are executed in order to accelerate the signal transmission between the CPUs and memory in the server and to ensure the signal quality transmitted between the CPUs and memory.
In addition, the processes are executed by the Basic Input/Output System Firmware (BIOS FW) in the server. The BIOS is a type of firmware for the server. And the BIOS is one of the programs for the lowest level of input/output with the hardware in the server. When many CPUs and memory are equipped with the server, the BIOS may take a long time to initialize the memory and a problem that the time required for starting the server becomes longer than the time for starting a server equipped with less CPUs and memory will arise.
Techniques are proposed for reducing the time for starting a server. For example, one of the proposed techniques is to initialize memory which is not used for starting a server in which the OS is installed in parallel with processes for starting the OS (See patent document 1). In addition, one of the proposed techniques is to reduce the time for initializing the memory by using CPUs or CPU cores to initialize different pieces of memory in the server (See patent document 2).
The following patent document describes conventional techniques related to the techniques described herein.
[Patent Document]
[Patent document 1] Japanese National Publication of International Patent Application No. 2009-277223
[Patent document 2] International Publication Pamphlet No. 2010/058440